1. Field of the Invention
The present invention relates to a circuit for driving an electroluminescence element which emits light by injecting a current thereinto.
2. Related Background Art
An electroluminescence element (hereinafter referred to as an EL element) is applied to a display panel type image display system in which a plurality of pixel display circuits including the EL elements are arranged in matrix (hereinafter referred to as a display panel), and the like. In general, the display panel has a large area, so that it cannot be formed on a single crystalline silicon substrate. Thus, the display panel is produced by a process of forming thin film transistors (TFTs) on a glass substrate.
For the EL element drive circuit, there are mainly two kinds of systems, a voltage setting system and a current setting system.
(Voltage Setting System)
First, a voltage setting system will be described using FIG. 9. FIG. 9 is a circuit diagram of a general pixel display circuit using the voltage setting system.
A signal supply line Video for inputting an image signal is connected with a source electrode (M15/S) of a MOS transistor M15 (MOS transistor is indicated by an abbreviation of M in this specification) whose gate electrode is controlled according to a control pulse P6 (in this specification, the source electrode, the drain electrode, and the gate electrode of the MOS transistor are indicated by abbreviations of /S, /D, and /G, respectively) The drain electrode of M15 (M15/D) is connected with one end of a capacitor C2. The other end of the capacitor C2 is connected with a capacitor C1 whose end is connected with a power source VCC, the gate electrode of M1 (M1/G) whose source electrode is connected with the power source VCC, and M17/S whose gate electrode is controlled according to a control pulse P5. M1/D and M17/D are connected with M16/S whose gate electrode is controlled according to a control pulse P4. M16/D is connected with a current injection terminal of an EL element. The other terminal of the EL element is connected with a ground GND.
A large number of pixel display circuits 1 are arranged in a display panel. In the case of, for example, QVGA (320xc3x97240), the signal supply line Video is led to and connected with 240 pixel display circuits 1. The control pulses P4 to P6 are led to and connected with 320 pixel display circuits 1.
The operation of the pixel display circuit 1 shown in FIG. 9 will be described using time charts in FIGS. 10A to 10E. FIGS. 10A to 10E are voltage state charts with respect to the signal supply line Video, the control pulse P4, the control pulse P5, the control pulse P6, and M1/G, respectively.
(Before Time t0)
A voltage on the signal supply line Video is a signal level Vv(nxe2x88x921) for light emission setting of the pixel display circuits 1 located on a preceding line. Because P4=L, P5=H, and P6=H, M15 is in an OFF state, M16 is in an ON state, and M17 is in an OFF state. Thus, a voltage of M1/G is kept to a voltage Vd# charged in the capacitor C1 by previously controlling the corresponding pixel display circuit 1. A current determined according to the voltage Vd# is injected into the EL element, so that EL element emits light.
(At Time t0)
P4 becomes H and P6 becomes L. Thus, M15 becomes an ON state and M16 becomes an OFF state. Subsequently, the signal supply line Video is set to a black level Vbk (maximum voltage). Subsequently, P5 is set to L, so that M17 is turned ON. At this time, M1 becomes a self discharge state. Thus, the capacitor C1 is discharged, so that a voltage of M1/G is increased.
Now, a current-voltage characteristic of a MOS transistor can be substantially indicated by a pentode characteristic of the equation (1):                                                                         Ids                =                                  k                  xc3x97                  Δ                  ⁢                                      xe2x80x83                                    ⁢                  V                                                                                                                          Δ                  ⁢                                      xe2x80x83                                    ⁢                  V                                =                                  Vgs                  -                  Vth                                                                    ]                            (        1        )            
where symbol Ids denotes a drain current, k denotes a drive coefficient, Vgs denotes a gate-source voltage, and Vth denotes a threshold voltage.
As can be understood from the equation (1), when Vgs approaches Vth, Ids becomes smaller. Thus, the self discharging operation of M1 becomes weaker. Therefore, as shown in FIG. 10E, the voltage of M1/G asymptotically approaches Vth. Further, the capacitor C2 is discharged such that a voltage between terminals becomes (Vccxe2x88x92Vthxe2x88x92Vbk).
(At Time t1)
Because P5 becomes H, M17 becomes an OFF state. Subsequently, because P4 becomes L, M16 becomes an ON state. Subsequently, the voltage on the signal supply line Video is reduced to a desirable level Vv(n), so that the voltage of M1/G is reduced by a voltage dv(n) indicated by the equation (2).
dv(n)=[C2÷(C1+C2)]xc3x97Vv(n)xe2x80x83xe2x80x83(2) 
In the equation (2), symbols C1 and C2 denote electric capacitances of the capacitors C1 and C2.
The voltage dv(n) is basically independent on a transition speed of Vv(n). The voltage dv(n) corresponds to xcex94V in the equation (1). Thus, a current is injected into the EL element through the transistor M1.
(At Time t2)
Because P6 becomes H, M15 becomes an OFF state. Subsequently, a current is injected into the EL element through the transistor M1, so that light emitting operation is continued until the next light emission setting operation. After the time t2, the same light emission setting operation is conducted for the pixel display circuits 1 located on the next row.
In the light emission setting operation of the pixel display circuit 1 shown in FIG. 9 as described above, M1/G is temporarily reset to a black level as the voltage Vth, and then a set voltage Vv is inputted thereto. Thus, the error voltage dv(n) for producing a drive current which is indicated by the equation (2) can be set in M1/G. Thus, an injection current into the EL element can be set without being affected by a variation in Vth which is promoted by a TFT process for the transistor M1 in each pixel display circuit 1 of the display panel and a variation in potential of each power source VCC which results from a wiring resistance.
(Current Setting System)
Next, a current setting system will be described using FIG. 6. FIG. 6 is a circuit diagram of a general pixel display circuit using the current setting system.
An image signal current obtained by converting an input image voltage signal into a current signal by a signal supply circuit is inputted to the signal supply line Video. The signal supply line Video is connected with M4/S whose gate electrode is controlled according to a control pulse P2. M4/D is connected with M2/D whose source electrode is connected with the power source VCC and M3/S whose gate electrode is controlled according to a control pulse P1. M2/G is connected with a capacitor C1 whose one end is connected with the power source VCC, M3/D, and M1/G whose source electrode is connected with the power source VCC. M1/D is connected with the current injection terminal of the EL element. The other terminal of the EL element is grounded (GND).
The operation of the pixel display circuit 1 shown in FIG. 6 will be described using time charts in FIGS. 7A to 7E. FIGS. 7A to 7E show the current image signal, the control pulse P1, the control pulse P2, and a voltage of M1/G, respectively, which are supplied to the signal supply line Video.
(Before Time t0)
A current on the signal supply line Video becomes a set current Id(nxe2x88x921) into the pixel display circuits 1 located on a preceding line. In addition, because P1=H and P2=L, M3 becomes an OFF state and M4 becomes an OFF state. A voltage Vd#(n) determined by the previous light emission setting operation is applied from the power source VCC to M1/G. Thus, an output current from M1 which is determined according to Vd#(n) is injected into the corresponding EL element, so that the EL element emits light.
(At Time t0)
A current on the signal supply line Video is changed into a current Id(n) for setting light emission of the corresponding pixel display circuit 1 shown in FIG. 6. In addition, because P1=L and P2=H, M3 is changed into an ON state and M4 is changed into an ON state. Thus, the current Id(n) supplied to the signal supply line Video is supplied to M2. In M2, a voltage of M2/G is changed so as to satisfy the equation (1), thereby charging the capacitor C1. Therefore, as shown in FIG. 7D, a change in which M1/G connected with M2/G turns from the voltage Vd#(n) to the voltage Vd(n) is started and then finished before the time t1.
(At Time t1)
Because P1=H, M3 is changed into an OFF state, so that the charging operation of the capacitor C1 is stopped. Thus, M1/G is kept to the voltage Vd(n) and becomes a holding state.
(At Time t2)
Because P2=L, M4 is changed into an OFF state, thereby stopping current supply to the transistor M2. Thus, according to an output current from M2 which is produced by the voltage Vd(n) applied to M2/G, a potential of M2/D is rapidly raised, so that it becomes the voltage of the power source VCC. At this time, because M2 becomes a resistor operating region, an output current from M2 is stopped, so that M2 is stabilized in that state. At this time, a change in voltage of M1/G is not caused to keep the voltage Vd(n). Thus, until the next light emission setting operation, the output current from the transistor M1 which is determined according to the voltage Vd(n) is injected into the EL element, light emission in this condition is continued.
(After Time t2)
A current on the signal supply line Video is changed into a set current Id(n+1) for setting light emission of the pixel display circuits 1 located on the next row. In addition, in the corresponding pixel display circuit 1, P1=H and P2=L are kept and the current is not changed until the next light emission setting operation. Then, the light emission setting operation for the pixel display circuits 1 located on the next row is similarly started.
Even in the current setting system as described above, when a display panel is, for example, QVGA (320xc3x97240), the signal supply line Video is led to and connected with 240 pixel display circuits 1. The control pulses P1 and P2 are led to and connected with 320 pixel display circuits 1. In the case of the current setting system, when drive characteristics of the transistors M1 and M2 in each pixel display circuit 1 can be relatively ensured, an injection current into the EL element can be logically set without being affected by the transition voltage Vth of each transistor and a variation in absolute value of the drive coefficient k in the equation (1). When two transistors are arranged close to each other, it can be realized with relative ease even in a TFT process that the drive characteristics of the transistors M1 and M2 in each pixel display circuit 1 are relatively ensured. Thus, according to the current setting system, the injection current can be basically set within a wide dynamic range from a small current to a large current, so that a uniformed high quality image can be displayed on the display panel.
However, the voltage drive system shown in FIG. 9 and the current drive system shown in FIG. 6, for driving the EL elements, have the following problems.
(Problems Related to Voltage Drive System in FIG. 9)
Problem 1 (Variation in Drive Coefficient k of Transistor)
As can be understood from the equation (1), the output current Ids of the MOS transistor is determined according to the drive coefficient k varied in each pixel display circuit 1. Thus, it is difficult to obtain uniform light emitting levels of respective pixels in the display panel. In order to obtain uniform light emitting levels, it is necessary to depend on the improvement of a difficult TFT process.
Problem 2 (Keeping of White Balance)
Also, a light emitting current is determined according to the square of the error voltage xcex94v. Thus, it is difficult to adjust white balance due to balance of light emitting energies of R, G, and B. In addition, because the light emitting current is sensitive to a drift, it is difficult to assure the white balance as the important element of a display image.
Problem 3 (Holding of Reset Period to Voltage Vth)
Further, in order to conduct complete reset operation, a long period is required as a reset operating period (t0 to t1) to Vth of M1/G in the pixel display circuit 1. This is because the self discharging operation of the transistor M1 is weakened as the voltage of M1/G asymptotically approaches Vth. Thus, light emission setting to a minute light emitting region is difficult, it is difficult to ensure a gradation property of the image, and it is difficult to realize a high quality display panel.
(Problem Related to Current Drive System in FIG. 6)
For example, when a size of a QVGA display panel is 2 inches, a maximum desirable injection current into an EL element for each color is a minute current of about 100 nA to 200 nA. In addition, a minimum current of about 1 nA or less is required as a minimum desirable current for ensuring a contrast. Thus, it is necessary to supply a current of from the minute current to the minimum current to the signal supply line Video. Now, when the characteristic equation of the MOS transistor which is indicated by the equation (1) is transformed, it becomes the following equation (3).                                                                                                               Δ                    ⁢                                          xe2x80x83                                        ⁢                    V                                    =                                                            Ids                                        ÷                    k                                                  ⁢                                  xe2x80x83                                                                                                        re                =                                                                                                    ⅆ                        Δ                                            ⁢                                              xe2x80x83                                            ⁢                      V                                                              ⅆ                      Ids                                                        =                                      1                                          k                      xc3x97                                              Ids                                                                                                                                                                                                          Δ                    ⁢                                          xe2x80x83                                        ⁢                    V                                    =                                      Vgs                    -                    Vth                                                  ⁢                                  xe2x80x83                                                                    ]                            (        3        )            
A dynamic resistance re of the transistor M2 in the pixel display circuit 1, by which a potential on the signal supply line Video is determined becomes a very high resistance. In a TFT process according to experiences of the present inventors, re (100 nA)xe2x89xa11 Mxcexa9 and re (1 nA)xe2x89xa110 Mxcexa9.
Problem 4 (Mixing of Noise into Signal Supplying Line Video)
As described above, the signal supply line Video is led to and connected with a large number of pixel display circuits 1. Thus, a disturbance noise is easily mixed into such a high resistance line. As described above, FIG. 7E shows a state of the voltage of M1/G when a noise is mixed into the signal supply line Video.
During a period except the period of the time t0 to the time t1, M3 is an OFF state. Thus, the signal supply line Video is not connected with M1/G of the corresponding pixel display circuit 1, so that no noise is mixed. However, during the period of the time t0 to the time t1, M3=ON and M4=ON, so that a noise is mixed into M1/G. Therefore, when M3 is changed into an OFF state at the time t1 and the voltage of M1/G is shifted to a holding state, an error of a voltage xcex94Vd to a desirable value of the voltage Vd(n) when no noise is mixed is caused. Accordingly, an output current shifted from a desirable output current is injected from the transistor M1 into the EL element, so that the amount of light emission is also shifted as a matter of course.
Because a noise cannot be controlled, the shift amount of light emission due to the mixing of noise in each pixel display circuit 1 is changed. Thus, a stable display image cannot be obtained. In addition, when an RGB image signal is small, the influence due to the mixing of noise becomes remarkable. Further, a deterioration in S/N of an image is caused.
The injection current required for the EL element is small. In general, even in a process for a TFT with low drive capacity (small drive coefficient k), a drive error voltage (Vgsxe2x88x92Vth) is about {fraction (1/10)} of the transition voltage Vth. Thus, a large influence is caused by an error of the voltage of M1/G due to the mixing of noise. Thus, in the current setting system, it is necessary to isolate the display panel from a disturbance noise. However, it is difficult to shield a light emitting surface of the display panel.
Also, in order to suppress a resistance value of the signal supply line Video, it is considered that a size of the transistor M2 in the pixel display circuit 1 is increased to increase the set current Ids, thereby suppressing the dynamic resistance value re of M2. However, even when the set current IDs is increased by ten times, re becomes only 1/{square root over (10)} from the equation (3). In addition, according to this method, a large transistor M2 cannot be mounted in the pixel display circuit 1 for a display panel in which a pixel size is limited. In particular, this does not become a solving method for a small size display panel for which the suppression of current consumption is required.
The present invention has been made in view of the above problems. An object of the present invention is to provide an EL element drive circuit capable of solving the problems and a display panel provided therewith.
According to one aspect of the invention in order to solve the above problems, there is provided an EL element drive circuit for causing an electroluminescence (EL) element which conducts light emitting operation according to an injection current to emit light, including:
the EL element; a first transistor; a second transistor; a third transistor; a capacitor; a first switch; a second switch; a third switch; and a power source, wherein:
a first main electrode of the first transistor is connected with a first main electrode of the second transistor and a gate electrode of the first transistor is connected with a gate electrode of the second transistor;
the capacitor is connected between the first main electrode of the first transistor and the gate electrode thereof;
the EL element is connected with a second main electrode of the first transistor;
the first switch is connected between a second main electrode of the second transistor and the gate electrode thereof;
the second switch is connected between a signal supply line for supplying a signal current defining an injection current into the EL element and the second main electrode of the second transistor;
a first main electrode of the third transistor is connected with the power source, a second main electrode thereof is connected with the first main electrode of the first transistor, and a gate electrode of the third transistor and one of the first main electrode thereof and the second main electrode thereof are short-circuited such that a current flows in a predetermined direction by a potential difference between the first main electrode thereof and the second main electrode thereof;
the third switch is connected between the power source and the first main electrode of the first transistor; and
the third switch is opened when the first switch and the second switch are short-circuited, and the third switch is short-circuited when the first switch and the second switch are opened.
According to another aspect of the invention in order to solve the above problems, there is provided a display panel, including a plurality of EL element drive circuits described above which are connected in matrix.
In another aspect of the invention, the EL element drive circuit may further include a pixel display circuit and a signal supply circuit;
the pixel display circuit may include the EL element, the first transistor, the second transistor, the capacitor, the first switch, the second switch, the third switch, and a fourth switch;
the signal supply circuit may include the third transistor;
the pixel display circuit and the signal supply circuit may be connected with each other through a noise reduction line and the signal supply line;
the second main electrode of the third transistor and the first main electrode of the first transistor may be connected with each other through at least the noise reduction line and the fourth switch; and
the third switch may be opened and the fourth switch may be short-circuited when the first switch and the second switch are short-circuited, and the third switch may be short-circuited and the fourth switch may be opened when the first switch and the second switch are opened.
According to another aspect of the invention in order to solve the above problems, there is provided a display panel including a plurality of EL element drive circuits each having at least the pixel display circuit and the signal supply circuit, wherein the pixel display circuits are connected in matrix, of the pixel display circuits connected in matrix, pixel display circuits belonging to each line are set at each group, and the pixel display circuits of each group are commonly connected with a signal supply circuit located for each group.